ADR-018: Memory system redesign — three tiers, world signal path

Context

Spectral’s 5-tier hierarchical memory system was designed to compound learning upward through increasingly broad scopes, culminating in Tier 5 global memory that fed back into evaluation framework templates. With SWMS as the authoritative source of evaluation frameworks, Tier 5’s primary output channel is replaced by world model evolution. Tier 4 was largely colonized by domain observations that, in the new design, belong as signals to spectral.worlds. The distinction between agent-specific operational knowledge (legitimately platform’s) and domain observations (legitimately worlds’) clarifies what each memory tier should hold.

Decision

The memory system is redesigned from five tiers to three. Tier 1 (Cycle Memory), Tier 2 (Run Memory), and Tier 3 (Workspace Memory) are retained with their current scope definitions. Tier 4 (Account Memory) and Tier 5 (Global Memory) are retired.

There is no T3-into-Worlds signal path (ADR-079): no T3-promotion-boundary classification step (domain observation vs agent-specific operational observation) and no world-signal-event routing from T3 to spectral.worlds. T3 memories exist for the owning agent’s own reasoning; they do not feed worlds for evolution. The platform→worlds signal source is the world agent’s override-pattern detection on operator overrides at decision time (per ADR-081). The three-tier memory architecture stands.

Consequences

• T4 and T5 are eliminated from the memory architecture and from the Codex documentation.
• The World Agent’s memory architecture is separate and independent from Spectral’s tiers, serving a different purpose. Its current design — including the tier vocabulary it uses — is defined in ADR-058.